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arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients
Add dynamic power coefficients for Silver and Gold CPUs on SC7180 SoC. Signed-off-by: Rajendra Nayak <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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1 file changed
+8
@@ -89,6 +89,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_0>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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@@ -106,6 +107,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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enable-method = "psci";
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_100>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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@@ -120,6 +122,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x200>;
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enable-method = "psci";
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_200>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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@@ -134,6 +137,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x300>;
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enable-method = "psci";
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_300>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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@@ -148,6 +152,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x400>;
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enable-method = "psci";
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_400>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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@@ -162,6 +167,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x500>;
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enable-method = "psci";
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_500>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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@@ -176,6 +182,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x600>;
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enable-method = "psci";
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dynamic-power-coefficient = <405>;
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next-level-cache = <&L2_600>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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@@ -190,6 +197,7 @@
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compatible = "arm,armv8";
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reg = <0x0 0x700>;
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enable-method = "psci";
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dynamic-power-coefficient = <405>;
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next-level-cache = <&L2_700>;
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#cooling-cells = <2>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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