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arm64: Increase the max granular size

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Increase the standard cacheline size to avoid having locks in the same
cacheline.

Cavium's ThunderX core implements cache lines of 128 byte size. With
current granulare size of 64 bytes (L1_CACHE_SHIFT=6) two locks could
share the same cache line leading a performance degradation.
Increasing the size fixes that.

Increasing the size has no negative impact to cache invalidation on
systems with a smaller cache line. There is an impact on memory usage,
but that's not too important for arm64 use cases.

Signed-off-by: Tirumalesh Chalamarla <[email protected]>
Signed-off-by: Robert Richter <[email protected]>
Acked-by: Timur Tabi <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
This commit is contained in:
Tirumalesh Chalamarla authored and Catalin Marinas committed 2015-10-28 19:09:17 +00:00
1 parent 6e4a0f2b5c
commit 9730348075
1 file changed
+1 -1
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arch/arm64/include/asm/cache.h
+1 -1
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@@ -18,7 +18,7 @@
#include <asm/cachetype.h>
#define L1_CACHE_SHIFT 6
#define L1_CACHE_SHIFT 7
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/*