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mmc: sdhci-of-esdhc: add erratum eSDHC5 support

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Software writing to the Transfer Type configuration register
(system clock domain) can cause a setup/hold violation in the
CRC flops (card clock domain), which can cause write accesses
to be sent with corrupt CRC values. This issue occurs only for
write preceded by read. this erratum is to fix this issue.

Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
This commit is contained in:
Yinbo Zhu authored and Ulf Hansson committed 2019-04-15 11:55:54 +02:00
1 parent 8e9a691993
commit a46e427125
1 file changed
+3
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drivers/mmc/host/sdhci-of-esdhc.c
+3
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@@ -1075,6 +1075,9 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
if (esdhc->vendor_ver > VENDOR_V_22)
host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
if (of_find_compatible_node(NULL, NULL, "fsl,p2020-esdhc"))
host->quirks2 |= SDHCI_QUIRK_RESET_AFTER_REQUEST;
if (of_device_is_compatible(np, "fsl,p5040-esdhc") ||
of_device_is_compatible(np, "fsl,p5020-esdhc") ||
of_device_is_compatible(np, "fsl,p4080-esdhc") ||