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The PHY reset signal goes to mpp43 on CP0.
Fixes: babc5544c2 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal")
Reported-by: Denis Odintsov <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>