Swapnil Jakhade 637feefb8a dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock ...

Add clock ID for Sierra derived reference clock.

Signed-off-by: Swapnil Jakhade <[email protected]>
Acked-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

2021-12-27 16:35:09 +05:30

..

phy-am654-serdes.h

dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC

2019-04-17 14:13:18 +05:30

phy-cadence.h

dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock

2021-12-27 16:35:09 +05:30

phy-imx8-pcie.h

dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy

2021-12-14 20:02:32 +05:30

phy-lan966x-serdes.h

dt-bindings: phy: Add constants for lan966x serdes

2021-11-23 13:09:08 +05:30

phy-lantiq-vrx200-pcie.h

dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs

2019-08-23 09:40:46 +05:30

phy-ocelot-serdes.h

dt-bindings: phy: Update SERDES_MAX to be SERDES_MAX + 1

2018-10-22 19:27:14 -07:00

phy-pistachio-usb.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422

2019-06-05 17:37:15 +02:00

phy-qcom-qusb2.h

…

phy-ti.h

dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper

2021-03-17 12:02:40 +05:30

phy.h

dt-bindings: msm: dsi: document phy-type property for 7nm dsi phy

2021-08-07 11:48:37 -07:00