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Terry Bowman
6777877eb7
The CXL driver plans to use cper_print_aer() for logging restricted CXL host (RCH) AER errors. cper_print_aer() is not currently exported and therefore not usable by the CXL drivers built as loadable modules. Export the cper_print_aer() function. Use the EXPORT_SYMBOL_NS_GPL() variant to restrict the export to CXL drivers. The CONFIG_ACPI_APEI_PCIEAER kernel config is currently used to enable cper_print_aer(). cper_print_aer() logs the AER registers and is useful in PCIE AER logging outside of APEI. Remove the CONFIG_ACPI_APEI_PCIEAER dependency to enable cper_print_aer(). The cper_print_aer() function name implies CPER specific use but is useful in non-CPER cases as well. Rename cper_print_aer() to pci_print_aer(). Also, update cxl_core to import CXL namespace imports. Co-developed-by: Robert Richter <[email protected]> Signed-off-by: Terry Bowman <[email protected]> Signed-off-by: Robert Richter <[email protected]> Cc: Mahesh J Salgaonkar <[email protected]> Cc: Oliver O'Halloran <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Jonathan Cameron <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Reviewed-by: Dave Jiang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dan Williams <[email protected]>
61 lines
1.3 KiB
C
61 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2006 Intel Corp.
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* Tom Long Nguyen ([email protected])
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* Zhang Yanmin ([email protected])
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*/
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#ifndef _AER_H_
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#define _AER_H_
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#include <linux/errno.h>
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#include <linux/types.h>
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#define AER_NONFATAL 0
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#define AER_FATAL 1
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#define AER_CORRECTABLE 2
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#define DPC_FATAL 3
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struct pci_dev;
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struct aer_header_log_regs {
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unsigned int dw0;
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unsigned int dw1;
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unsigned int dw2;
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unsigned int dw3;
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};
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struct aer_capability_regs {
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u32 header;
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u32 uncor_status;
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u32 uncor_mask;
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u32 uncor_severity;
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u32 cor_status;
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u32 cor_mask;
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u32 cap_control;
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struct aer_header_log_regs header_log;
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u32 root_command;
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u32 root_status;
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u16 cor_err_source;
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u16 uncor_err_source;
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};
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#if defined(CONFIG_PCIEAER)
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int pci_aer_clear_nonfatal_status(struct pci_dev *dev);
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int pcie_aer_is_native(struct pci_dev *dev);
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#else
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static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev)
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{
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return -EINVAL;
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}
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static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
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#endif
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void pci_print_aer(struct pci_dev *dev, int aer_severity,
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struct aer_capability_regs *aer);
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int cper_severity_to_aer(int cper_severity);
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void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
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int severity, struct aer_capability_regs *aer_regs);
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#endif //_AER_H_
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