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ARM: dts: aspeed: Add LPC clock phandles

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The LPC device uses LCLK.

Tested-by: Lei YU <[email protected]>
Reviewed-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
This commit is contained in:
Joel Stanley committed 2018-02-19 17:59:53 +10:30
1 parent 542d2f4588
commit 7674bf96b8
2 files changed
+2
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arch/arm/boot/dts/aspeed-g4.dtsi
+1
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@@ -233,6 +233,7 @@
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2400-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
arch/arm/boot/dts/aspeed-g5.dtsi
+1
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@@ -283,6 +283,7 @@
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};