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MIPS: PCI: refactor ioc3 special handling
Refactored code to only have one ioc3 special handling for read access and one for write access. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Dmitry Torokhov <[email protected]> Cc: Lee Jones <[email protected]> Cc: David S. Miller <[email protected]> Cc: Srinivas Kandagatla <[email protected]> Cc: Alessandro Zummo <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Jiri Slaby <[email protected]> Cc: Evgeniy Polyakov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
This commit is contained in:
Thomas Bogendoerfer authored and Paul Burton committed
1 parent
60af0d94cc
commit
813cafc410
1 file changed
+62
-105
@@ -20,16 +20,50 @@
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* Most of the IOC3 PCI config register aren't present
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* we emulate what is needed for a normal PCI enumeration
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*/
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static u32 emulate_ioc3_cfg(int where, int size)
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static int ioc3_cfg_rd(void *addr, int where, int size, u32 *value)
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{
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if (size == 1 && where == 0x3d)
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return 0x01;
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else if (size == 2 && where == 0x3c)
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return 0x0100;
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else if (size == 4 && where == 0x3c)
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return 0x00000100;
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u32 cf, shift, mask;
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return 0;
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switch (where & ~3) {
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case 0x00 ... 0x10:
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case 0x40 ... 0x44:
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if (get_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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break;
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case 0x3c:
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/* emulate sane interrupt pin value */
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cf = 0x00000100;
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break;
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default:
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cf = 0;
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break;
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}
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shift = (where & 3) << 3;
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mask = 0xffffffffU >> ((4 - size) << 3);
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*value = (cf >> shift) & mask;
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return PCIBIOS_SUCCESSFUL;
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}
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static int ioc3_cfg_wr(void *addr, int where, int size, u32 value)
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{
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u32 cf, shift, mask, smask;
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if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
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return PCIBIOS_SUCCESSFUL;
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if (get_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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shift = ((where & 3) << 3);
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mask = (0xffffffffU >> ((4 - size) << 3));
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smask = mask << shift;
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cf = (cf & ~smask) | ((value & mask) << shift);
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if (put_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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static void bridge_disable_swapping(struct pci_dev *dev)
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@@ -64,7 +98,7 @@ static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
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int slot = PCI_SLOT(devfn);
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int fn = PCI_FUNC(devfn);
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void *addr;
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u32 cf, shift, mask;
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u32 cf;
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int res;
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
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@@ -75,8 +109,10 @@ static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
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* IOC3 is broken beyond belief ... Don't even give the
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* generic PCI code a chance to look at it for real ...
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*/
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
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goto is_ioc3;
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16))) {
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
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return ioc3_cfg_rd(addr, where, size, value);
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}
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
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@@ -88,26 +124,6 @@ static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
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res = get_dbe(*value, (u32 *)addr);
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return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
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is_ioc3:
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/*
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* IOC3 special handling
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*/
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if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
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*value = emulate_ioc3_cfg(where, size);
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return PCIBIOS_SUCCESSFUL;
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}
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
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if (get_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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shift = ((where & 3) << 3);
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mask = (0xffffffffU >> ((4 - size) << 3));
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*value = (cf >> shift) & mask;
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return PCIBIOS_SUCCESSFUL;
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}
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static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
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@@ -119,7 +135,7 @@ static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
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int slot = PCI_SLOT(devfn);
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int fn = PCI_FUNC(devfn);
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void *addr;
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u32 cf, shift, mask;
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u32 cf;
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int res;
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bridge_write(bc, b_pci_cfg, (busno << 16) | (slot << 11));
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@@ -131,8 +147,10 @@ static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
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* IOC3 is broken beyond belief ... Don't even give the
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* generic PCI code a chance to look at it for real ...
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*/
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
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goto is_ioc3;
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16))) {
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addr = &bridge->b_type1_cfg.c[(fn << 8) | (where & ~3)];
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return ioc3_cfg_rd(addr, where, size, value);
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}
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addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
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@@ -144,26 +162,6 @@ static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
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res = get_dbe(*value, (u32 *)addr);
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return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
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is_ioc3:
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/*
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* IOC3 special handling
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*/
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if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
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*value = emulate_ioc3_cfg(where, size);
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return PCIBIOS_SUCCESSFUL;
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}
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addr = &bridge->b_type1_cfg.c[(fn << 8) | where];
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if (get_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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shift = ((where & 3) << 3);
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mask = (0xffffffffU >> ((4 - size) << 3));
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*value = (cf >> shift) & mask;
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return PCIBIOS_SUCCESSFUL;
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}
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static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
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@@ -183,7 +181,7 @@ static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
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int slot = PCI_SLOT(devfn);
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int fn = PCI_FUNC(devfn);
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void *addr;
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u32 cf, shift, mask, smask;
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u32 cf;
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int res;
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
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@@ -194,8 +192,10 @@ static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
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* IOC3 is broken beyond belief ... Don't even give the
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* generic PCI code a chance to look at it for real ...
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*/
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
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goto is_ioc3;
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16))) {
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
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return ioc3_cfg_wr(addr, where, size, value);
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}
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
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@@ -210,29 +210,6 @@ static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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is_ioc3:
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/*
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* IOC3 special handling
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*/
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if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
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return PCIBIOS_SUCCESSFUL;
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
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if (get_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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shift = ((where & 3) << 3);
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mask = (0xffffffffU >> ((4 - size) << 3));
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smask = mask << shift;
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cf = (cf & ~smask) | ((value & mask) << shift);
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if (put_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
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@@ -244,7 +221,7 @@ static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
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int fn = PCI_FUNC(devfn);
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int busno = bus->number;
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void *addr;
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u32 cf, shift, mask, smask;
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u32 cf;
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int res;
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bridge_write(bc, b_pci_cfg, (busno << 16) | (slot << 11));
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@@ -256,8 +233,10 @@ static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
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* IOC3 is broken beyond belief ... Don't even give the
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* generic PCI code a chance to look at it for real ...
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*/
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
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goto is_ioc3;
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if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16))) {
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
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return ioc3_cfg_wr(addr, where, size, value);
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}
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addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
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@@ -272,28 +251,6 @@ static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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is_ioc3:
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/*
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* IOC3 special handling
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*/
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if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
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return PCIBIOS_SUCCESSFUL;
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addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
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if (get_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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shift = ((where & 3) << 3);
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mask = (0xffffffffU >> ((4 - size) << 3));
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smask = mask << shift;
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cf = (cf & ~smask) | ((value & mask) << shift);
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if (put_dbe(cf, (u32 *)addr))
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
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