KVM: Order segment register constants in the same way as cpu operand encoding

This can be used to simplify the x86 instruction decoder.

Signed-off-by: Avi Kivity <[email protected]>
This commit is contained in:
Avi Kivity committed 2008-07-20 12:42:26 +03:00
1 parent f08864b42a
commit 81609e3e26
1 file changed
+3 -3
+3 -3
View File
@@ -109,12 +109,12 @@ enum {
};
enum {
VCPU_SREG_CS,
VCPU_SREG_DS,
VCPU_SREG_ES,
VCPU_SREG_CS,
VCPU_SREG_SS,
VCPU_SREG_DS,
VCPU_SREG_FS,
VCPU_SREG_GS,
VCPU_SREG_SS,
VCPU_SREG_TR,
VCPU_SREG_LDTR,
};