BackPup/Linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-09-25 21:21:09 -04:00
Code Issues Packages Projects Releases Wiki Activity

MIPS: BMIPS: add clock controller nodes

Browse Source 
Now that we have a driver for the clock controller, add nodes to allow
devices to make use of it.

Signed-off-by: Jonas Gorski <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: Kevin Cernekee <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: James Hogan <[email protected]>
This commit is contained in:
Jonas Gorski
2019-07-21 15:23:24 -07:00
committed by Paul Burton
parent 5dad549d94
commit a23c413495
6 changed files with 51 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/mips/boot/dts/brcm/bcm3368.dtsi
+9 -3
View File
@@ -51,16 +51,22 @@
compatible = "simple-bus";
ranges;
periph_cntl: syscon@fff8c000 {
clkctl: clock-controller@fff8c004 {
compatible = "brcm,bcm3368-clocks";
reg = <0xfff8c004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@fff8c008 {
compatible = "syscon";
reg = <0xfff8c000 0xc>;
reg = <0xfff8c000 0x4>;
native-endian;
};
reboot: syscon-reboot@fff8c008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x8>;
offset = <0x0>;
mask = <0x1>;
};
arch/mips/boot/dts/brcm/bcm63268.dtsi
+9 -3
View File
@@ -51,16 +51,22 @@
compatible = "simple-bus";
ranges;
periph_cntl: syscon@10000000 {
clkctl: clock-controller@10000004 {
compatible = "brcm,bcm63268-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@10000008 {
compatible = "syscon";
reg = <0x10000000 0x14>;
reg = <0x10000000 0xc>;
native-endian;
};
reboot: syscon-reboot@10000008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x8>;
offset = <0x0>;
mask = <0x1>;
};
arch/mips/boot/dts/brcm/bcm6328.dtsi
+6
View File
@@ -51,6 +51,12 @@
compatible = "simple-bus";
ranges;
clkctl: clock-controller@10000004 {
compatible = "brcm,bcm6328-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
arch/mips/boot/dts/brcm/bcm6358.dtsi
+9 -3
View File
@@ -51,16 +51,22 @@
compatible = "simple-bus";
ranges;
periph_cntl: syscon@fffe0000 {
clkctl: clock-controller@fffe0004 {
compatible = "brcm,bcm6358-clocks";
reg = <0xfffe0004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@fffe0008 {
compatible = "syscon";
reg = <0xfffe0000 0xc>;
reg = <0xfffe0000 0x4>;
native-endian;
};
reboot: syscon-reboot@fffe0008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x8>;
offset = <0x0>;
mask = <0x1>;
};
arch/mips/boot/dts/brcm/bcm6362.dtsi
+9 -3
View File
@@ -51,16 +51,22 @@
compatible = "simple-bus";
ranges;
periph_cntl: syscon@10000000 {
clkctl: clock-controller@10000004 {
compatible = "brcm,bcm6362-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@10000008 {
compatible = "syscon";
reg = <0x10000000 0x14>;
reg = <0x10000000 0xc>;
native-endian;
};
reboot: syscon-reboot@10000008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x8>;
offset = <0x0>;
mask = <0x1>;
};
arch/mips/boot/dts/brcm/bcm6368.dtsi
+9 -3
View File
@@ -51,16 +51,22 @@
compatible = "simple-bus";
ranges;
periph_cntl: syscon@10000000 {
clkctl: clock-controller@10000004 {
compatible = "brcm,bcm6368-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@100000008 {
compatible = "syscon";
reg = <0x10000000 0x14>;
reg = <0x10000000 0xc>;
native-endian;
};
reboot: syscon-reboot@10000008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x8>;
offset = <0x0>;
mask = <0x1>;
};