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arm64/sysreg: Convert TRBTRG_EL1 register to automatic generation

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This converts TRBTRG_EL1 register to automatic generation without
causing any functional change.

Cc: Will Deacon <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Mark Brown <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Suzuki K Poulose <[email protected]>
Cc: James Morse <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Mark Brown <[email protected]>
Signed-off-by: Anshuman Khandual <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Catalin Marinas <[email protected]>
This commit is contained in:
Anshuman Khandual authored and Catalin Marinas committed 2023-06-14 14:37:35 +01:00
1 parent 3077b1db9d
commit a56035c95e
2 files changed
+5 -3
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arch/arm64/include/asm/sysreg.h
-3
View File
@@ -227,13 +227,10 @@
/*** End of Statistical Profiling Extension ***/
#define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6)
#define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7)
#define TRBSR_EL1_BSC_MASK GENMASK(5, 0)
#define TRBSR_EL1_BSC_SHIFT 0
#define TRBTRG_EL1_TRG_MASK GENMASK(31, 0)
#define TRBTRG_EL1_TRG_SHIFT 0
#define TRBIDR_EL1_F BIT(5)
#define TRBIDR_EL1_P BIT(4)
#define TRBIDR_EL1_Align_MASK GENMASK(3, 0)
arch/arm64/tools/sysreg
+5
View File
@@ -2314,3 +2314,8 @@ Enum 9:8 SH
EndEnum
Field 7:0 Attr
EndSysreg
Sysreg TRBTRG_EL1 3 0 9 11 6
Res0 63:32
Field 31:0 TRG
EndSysreg