ARM: dts: ls1021a: Add memory controller

The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.

Signed-off-by: Patrick Havelange <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
This commit is contained in:
Patrick Havelange authored and Shawn Guo committed 2019-01-10 15:03:24 +08:00
1 parent 02f95c3551
commit cd8281acdf
1 file changed
+7
+7
View File
@@ -125,6 +125,13 @@
interrupt-parent = <&gic>;
ranges;
ddr: memory-controller@1080000 {
compatible = "fsl,qoriq-memory-controller";
reg = <0x0 0x1080000 0x0 0x1000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
big-endian;
};
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;