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lib/div64.c: off by one in shift

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fls counts bits starting from 1 to 32 (returns 0 for zero argument).  If
we add 1 we shift right one bit more and loose precision from divisor,
what cause function incorect results with some numbers.

Corrected code was tested in user-space, see bugzilla:
   https://bugzilla.kernel.org/show_bug.cgi?id=202391

Link: http://lkml.kernel.org/r/[email protected]
Fixes: 658716d19f ("div64_u64(): improve precision on 32bit platforms")
Signed-off-by: Stanislaw Gruszka <[email protected]>
Reported-by: Siarhei Volkau <[email protected]>
Tested-by: Siarhei Volkau <[email protected]>
Acked-by: Oleg Nesterov <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
This commit is contained in:
Stanislaw Gruszka authored and Linus Torvalds committed 2019-03-07 18:32:00 -08:00
1 parent 1db604f676
commit cdc94a3749
1 file changed
+2 -2
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lib/div64.c
+2 -2
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@@ -109,7 +109,7 @@ u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder)
quot = div_u64_rem(dividend, divisor, &rem32);
*remainder = rem32;
} else {
int n = 1 + fls(high);
int n = fls(high);
quot = div_u64(dividend >> n, divisor >> n);
if (quot != 0)
@@ -147,7 +147,7 @@ u64 div64_u64(u64 dividend, u64 divisor)
if (high == 0) {
quot = div_u64(dividend, divisor);
} else {
int n = 1 + fls(high);
int n = fls(high);
quot = div_u64(dividend >> n, divisor >> n);
if (quot != 0)