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ARM: dts: imx: Adjust CPU nodes

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Make CPU nodes consistent throughout the i.MX dts files, which
also matches the description from ePAPR spec.

This also fixes the following W=1 warning in some cases:

Warning (unit_address_vs_reg): Node /cpus/cpu@0 has a unit name, but no reg property

Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
This commit is contained in:
Fabio Estevam authored and Shawn Guo committed 2017-01-02 13:59:41 +08:00
1 parent 0c744ea4f7
commit d447dd884a
7 files changed
+18 -11
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arch/arm/boot/dts/imx1.dtsi
+2 -1
View File
@@ -43,8 +43,9 @@
#size-cells = <0>;
#address-cells = <1>;
cpu: cpu@0 {
cpu@0 {
device_type = "cpu";
reg = <0>;
compatible = "arm,arm920t";
operating-points = <200000 1900000>;
clock-latency = <62500>;
arch/arm/boot/dts/imx23.dtsi
+3 -2
View File
@@ -29,12 +29,13 @@
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
arch/arm/boot/dts/imx25.dtsi
+3 -2
View File
@@ -43,12 +43,13 @@
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
arch/arm/boot/dts/imx27.dtsi
+1
View File
@@ -65,6 +65,7 @@
cpu: cpu@0 {
device_type = "cpu";
reg = <0>;
compatible = "arm,arm926ej-s";
operating-points = <
/* kHz uV */
arch/arm/boot/dts/imx28.dtsi
+3 -2
View File
@@ -40,12 +40,13 @@
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
arch/arm/boot/dts/imx31.dtsi
+3 -2
View File
@@ -22,12 +22,13 @@
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm1136jf-s";
device_type = "cpu";
reg = <0>;
};
};
arch/arm/boot/dts/imx35.dtsi
+3 -2
View File
@@ -27,12 +27,13 @@
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm1136jf-s";
device_type = "cpu";
reg = <0>;
};
};