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arm64: dts: marvell: add CP110 uart peripherals

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The CP110 component has 4 uart peripherals. All of them use the same clock
gate for slow peripherals that is shared with the i2c and spi peripherals.

Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
This commit is contained in:
Baruch Siach authored and Gregory CLEMENT committed 2018-02-14 11:42:22 +01:00
1 parent afe8e5a900
commit ff1c516ed1
1 file changed
+40
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arch/arm64/boot/dts/marvell/armada-cp110.dtsi
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@@ -298,6 +298,46 @@
status = "disabled";
};
CP110_LABEL(uart0): serial@702000 {
compatible = "snps,dw-apb-uart";
reg = <0x702000 0x100>;
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
status = "disabled";
};
CP110_LABEL(uart1): serial@702100 {
compatible = "snps,dw-apb-uart";
reg = <0x702100 0x100>;
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
status = "disabled";
};
CP110_LABEL(uart2): serial@702200 {
compatible = "snps,dw-apb-uart";
reg = <0x702200 0x100>;
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
status = "disabled";
};
CP110_LABEL(uart3): serial@702300 {
compatible = "snps,dw-apb-uart";
reg = <0x702300 0x100>;
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
status = "disabled";
};
CP110_LABEL(nand): nand@720000 {
/*
* Due to the limitation of the pins available