When the stacktrace simplification changes went in the function
definition on SH got skipped, fix it up so things build again.
Signed-off-by: Paul Mundt <[email protected]>
This adds basic support for clockevents and clocksources,
presently only implemented for TMU-based systems (which
are the majority of SH-3 and SH-4 systems).
The old NO_IDLE_HZ implementation is also dropped completely,
the only users of this were on TMU-based systems anyways.
More work needs to be done to generalize the TMU handling,
in that the current implementation is rather tied to the
notion of TMU0 and TMU1 utilization.
Additionally, as more SH timers switch over to this scheme,
we'll be able to gut most of the remaining system timer
infrastructure that existed before.
Signed-off-by: Paul Mundt <[email protected]>
Most SH platforms aren't going to need more than a single active
region, ones that need more can pad this out as necessary.
Signed-off-by: Paul Mundt <[email protected]>
When the rtc_update_irq() callsites stopped passing in the
class_dev, the rtc_dev references weren't fixed. Fix it up,
so we pass in the proper pointer.
Signed-off-by: Paul Mundt <[email protected]>
There are a few different cases for figuring out how to
size the instruction. We read in the instruction located
at regs->pc - 4 when rewinding the opcode to figure out if
there's a 32-bit opcode before the faulting instruction, with
a default of a - 2 adjustment on a mismatch. In practice this
works for the cases where pc - 4 is just another 16-bit opcode,
or we happen to have a 32-bit and a 16-bit immediately
preceeding the pc value.
In the cases where we aren't rewinding, this is much less ugly..
We also don't bother fixing up the places where we're explicitly
dealing with 16-bit instructions, since this might lead to
confusion regarding the encoding size possibilities on other
CPU variants.
Signed-off-by: Paul Mundt <[email protected]>
SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.
Signed-off-by: Paul Mundt <[email protected]>
modpost noticed that __div64_32 was being exported twice:
WARNING: lib/built-in: '__div64_32' exported twice. Previous export was
in arch/sh/kernel/built-in.ko
kill off the duplicate.
Signed-off-by: Paul Mundt <[email protected]>
The only difference between these at the moment are the FPU
exceptions, and these are hidden away under CONFIG_SH_FPU
(which is only set for the SH-4 case anyways..).
This consolidates the two tables, and updates SH-4 to use
the updated copy.
Signed-off-by: Paul Mundt <[email protected]>
Previously this was only set when CONFIG_BUG=y. While we rely
on that for handle_BUG() dispatch, we still want to hand the
opcode off to the die chain notifier for determining the trap
value.
Signed-off-by: Paul Mundt <[email protected]>
This moves SH over to the generic quicklists. As per x86_64,
we have special mappings for the PGDs, so these go on their
own list..
Signed-off-by: Paul Mundt <[email protected]>
There are cases when we do not want to wait on the delay for automatically
updating the "real" framebuffer, this implements a simple ->fsync() hook
for explicitly flushing the deferred I/O work. The ->page_mkwrite()
handler will rearm the work queue normally.
(akpm: nuke unneeded ifdefs, forward-delcare struct dentry)
Signed-off-by: Paul Mundt <[email protected]>
Cc: Jaya Kumar <[email protected]>
Acked-by: Antonino Daplas <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
Previously this was done in cpuinfo, but with the number of clocks
growing, it makes more sense to place this in a different proc entry.
Signed-off-by: Paul Mundt <[email protected]>
This wasn't being set before, so now it's set for when it makes sense.
The shwdt case still requires HZ to be fixed at 1000 for the WOVF period,
so this is still preserved.
Signed-off-by: Paul Mundt <[email protected]>
Previously we've been handling udivdi3 references and wrapping
them in to div64_32() automatically. This doesn't get a lot of
use, however, and as akpm noted in the recent thread on l-k:
http://lkml.org/lkml/2007/2/27/241
we're better off simply ripping it out and going the do_div()
route if there happen to be any places that need it.
Signed-off-by: Paul Mundt <[email protected]>
This reworks some of the node 0 bootmem initialization in
preparation for discontigmem and sparsemem support.
ARCH_POPULATES_NODE_MAP is switched to as a result of this.
Signed-off-by: Paul Mundt <[email protected]>
With the GDB stub being entered via a special sysrq trigger,
we don't want to hit it directly from sci_br_interrupt().
Without this, there is access to the other sysrq triggers when
kgdb is enabled.
Signed-off-by: Paul Mundt <[email protected]>
This adds preliminary support for the SH7785-based Highlander board.
Some of the Highlander support code is reordered so that most of it
can be reused directly.
This also plugs in missing SH7785 checks in the places that need it,
as this is the first board to support the CPU.
Signed-off-by: Paul Mundt <[email protected]>
Each board sets the total number of IRQs that it's interested in via
the machvec. Previously we cared about the off vs on-chip IRQ range,
but any code relying on that is long dead. Set NR_IRQS to something
sensible given the vector range, and allow boards to cap it if they
really care.
Signed-off-by: Paul Mundt <[email protected]>
Wire up GENERIC_BUG for SH. This moves off of the special bug
frame and on to the generic struct bug_entry. Roughly the same
semantics are retained, and we can kill off some of the verbose
BUG() reporting code.
Signed-off-by: Paul Mundt <[email protected]>
SH7780 has a speculative execution mode where it can speculatively
perform an instruction fetch for subroutine returns, this allows it
to be enabled. There are some various pitfalls associated with this
mode, so it's left as depending on CONFIG_EXPERIMENTAL and not
enabled by default.
Signed-off-by: Paul Mundt <[email protected]>
The kgdb thread support is woefully out of date (it predates
the pidhash), and needs a complete rewrite before it's useful
again. Just rip it out entirely.
Updating the unified kgdb stub is a more worthwhile endeavour
for anyone that happens to be interested in this, at present
it's just limping along.
Signed-off-by: Paul Mundt <[email protected]>
This code has suffered quite a bit of bitrot, do some basic
tidying to get it to a reasonably functional state again.
This gets the basic support and the console working again.
Signed-off-by: Paul Mundt <[email protected]>
As reported by Manuel:
When I build linux with GCC-4.x and enable
CONFIG_CC_OPTIMIZE_FOR_SIZE linking fails with this error:
LD .tmp_vmlinux1
kernel/built-in.o: In function '__cmpxchg_called_with_bad_pointer'
make[1]: *** [.tmp_vmlinux1] Error 1
make: *** [_all] Error 2
This ended up being an inlining problem, fixed by explicitly
including linux/compiler.h and grabbing the definitions from there.
Signed-off-by: Paul Mundt <[email protected]>
__sdivsi3_i4i, __udiv_qrnnd_16, and __udivsi3_i4i don't exist
outside of the ST compiler, so kill them off.
This causes compile failures with other GCC4 compilers.
Signed-off-by: Paul Mundt <[email protected]>
The sh-sci sci_br_interrupt() handler was failing to call
in to uart_handle_break(), which was something that only
the SH-3 path was doing, fix that up.
Additionally, SUPPORT_SYSRQ seems to have moved down too
far, move it back to the top so uart_handle_break() and
friends aren't no-ops.
Signed-off-by: Paul Mundt <[email protected]>
SH-3 and SH-4 were trampling the register, and SH-2 wasn't even
setting it in the first place. This ended up with some rather
broken behaviour in the sysrq show_regs().
Signed-off-by: Paul Mundt <[email protected]>
The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.
Signed-off-by: Paul Mundt <[email protected]>
For some reason sh was missing __NR_readahead, even though the
syscall was wired up, and the slot was reserved. Caught with
dwmw2's missing syscall checker.
Signed-off-by: Paul Mundt <[email protected]>
Currently sm501fb_crtsrc_store() won't allow the routing to be changed via
echos from userspace in to the sysfs file. The reason for this is that the
strnicmp() for both heads uses a sizeof() for the string length, which ends
up being strlen() + 1 (\0 in the normal case, but the echo gives a newline,
which is where the issue occurs), this then causes a mismatch and
subsequently bails with the -EINVAL.
In addition to this, the hardcoded lengths were then used for the store
length that was returned, which ended up being erroneous and resulting in a
write error. There's also no point in returning anything but the full
length since it will -EINVAL out on a mismatch well before then anyways.
sizeof("string") is great for making sure you have space in your buffer,
but rather less so for string comparisons :-)
Signed-off-by: Paul Mundt <[email protected]>
Acked-by: Ben Dooks <[email protected]>
Cc: "Antonino A. Daplas" <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
We don't have any use for these machvec fixups anymore, kill them all
off and go with the generic instead.
Signed-off-by: Paul Mundt <[email protected]>
This enables the SM501 drivers for the R2D board. Additional
work needs to be done to migrate off of the VoyagerGX cchip
code to make use of the rest of the mfd infrastructure.
Signed-off-by: Paul Mundt <[email protected]>
This tidies up some of the rts7751r2d mess and gets it booting
again. Update the defconfig, too.
Signed-off-by: Masayuki Hosokawa <[email protected]>
Signed-off-by: Paul Mundt <[email protected]>
Neither of these have had any maintenance in years, and there's
no interest in keeping them straggling along. These have already
been slated for removal some time, so finally just get rid of them.
Signed-off-by: Paul Mundt <[email protected]>
Tidy up the R7780RP I/O mapping routines and switch the
pata_platform resources to IORESOURCE_MEM types, killing off
the useless port->addr conversion.
This fixes up R7780RP to boot after the recent devres conversion.
Signed-off-by: Paul Mundt <[email protected]>
This ended up causing problems for older parts (particularly ones
using PTEA). Revert this for now, it can be added back in once it's
had some more testing.
Signed-off-by: Paul Mundt <[email protected]>
This consolidates the various board heartbeat LED implementations,
used for strobing the load average across a LED bank. Those boards
not implementing a full bank can hook in via the LED class.
We leave the compat hook in the machvec for now until those non-banked
boards are able to migrate to the drivers/leds.
Signed-off-by: Paul Mundt <[email protected]>
This is used by the libc for parsing CPU capability flags passed
via the ELF auxvt, needed for run-time selection of atomic opcodes
amongst other things.
Signed-off-by: Paul Mundt <[email protected]>
Convert some of the global flush users over to using the local variants
that don't need to use the global routines.
Signed-off-by: Paul Mundt <[email protected]>
Rename the existing flush routines to local_ variants for use by
the IPI-backed global flush routines on SMP.
Signed-off-by: Paul Mundt <[email protected]>
There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.
Signed-off-by: Paul Mundt <[email protected]>
Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.
Signed-off-by: Paul Mundt <[email protected]>
Only SH-4 needs to set _PAGE_WT when using write-through caching,
don't attempt to set it on SH-3 where it ends up being a reserved
bit.
Signed-off-by: Paul Mundt <[email protected]>
This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.
With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.
And finally, explicitly disable the lazy writeback on SMP (SH-4A).
Signed-off-by: Paul Mundt <[email protected]>
There were a few more things that needed fixing up, namely THREAD_SIZE
and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE
assumptions were being made.
Signed-off-by: Paul Mundt <[email protected]>
The iVDR clock enable bit happens to actually reside in a rather
different place than what is documented, so fix it up accordingly.
This fixes up SATA boot for some of the R7780RP boards that didn't
default-enable the clock in the loader.
Signed-off-by: Paul Mundt <[email protected]>
-m2 doesn't end up working particularly well when we've got a constrained
toolchain target. Switch to the same semantics used by SH-4A to attempt
to get it right. Spotted by Alex Song <[email protected]>.
Signed-off-by: Paul Mundt <[email protected]>
This rips out most of the needlessly complicated sh_bios and kgdb
trap handling, and forces it all through a common fast dispatch path.
As more debug traps are inserted, it's important to keep them in sync
for all of the parts, not just SH-3/4.
As the SH-2 parts are unable to do traps in the >= 0x40 range, we
restrict the debug traps to the 0x30-0x3f range on all parts, and
also bump the kgdb breakpoint trap down in to this range (from 0xff
to 0x3c) so it's possible to use for nommu.
Optionally, this table can be padded out to catch spurious traps for
SH-3/4, but we don't do that yet..
Signed-off-by: Paul Mundt <[email protected]>
At the moment the inode/dentry cache hash tables (common by way of
alloc_large_system_hash()) are incorrectly sized by their respective
detection logic when we attempt to use large base pages on systems with
little memory.
This results in odd behaviour when using a 64kB PAGE_SIZE, such as:
Dentry cache hash table entries: 8192 (order: -1, 32768 bytes)
Inode-cache hash table entries: 4096 (order: -2, 16384 bytes)
The mount cache hash table is seemingly the only one that gets this right
by directly taking PAGE_SIZE in to account.
The following patch attempts to catch the bogus values and round it up to
at least 0-order.
Signed-off-by: Paul Mundt <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
This was inadvertently broken when the entry.S code split up,
restore the missing branch and get subsequent traps working
under debug again. This manifested itself as a lockup when
attempting to reload the VBR base.
Signed-off-by: Paul Mundt <[email protected]>
SH-2 and SH-2A need to use a different syscall base for the trapa
vector than the other parts, so fixup the logic in the kernel_execve()
case.
Signed-off-by: Paul Mundt <[email protected]>
Some time ago the schedule frame size changed and we failed to reflect
this in get_wchan() at the time. This first popped up as a problem on
SH7751R where schedule_frame ended up being unaligned and generating
an unaligned trap. This fixes it up again..
Signed-off-by: Paul Mundt <[email protected]>
Previously we haven't been doing anything with verbose BUG() reporting,
and we've been relying on the oops path for handling BUG()'s, which is
rather sub-optimal.
This switches BUG handling to use a fixed trapa vector (#0x3e) where we
construct a small bug frame post trapa instruction to get the context
right. This also makes it trivial to wire up a DIE_BUG for the atomic
die chain, which we couldn't really do before.
Signed-off-by: Paul Mundt <[email protected]>
We have a few different ways to do the atomic operations, so split
them out in to different headers rather than bloating atomic.h.
Kernelspace gUSA will take this up to a third implementation.
Signed-off-by: Paul Mundt <[email protected]>
In the 64-bit PTE case there's no point in restricting the encoding
to the low bits of the PTE, we can instead bump all of this up to
the high 32 bits and extend PTE_FILE_MAX_BITS to 32, adopting the
same convention used by x86 PAE.
There's a minor discrepency between the number of bits used for the
swap type encoding between 32 and 64-bit PTEs, but this is unlikely
to cause any problem given the extended offset.
Signed-off-by: Paul Mundt <[email protected]>
This looks like a result of too many auto-merges. The
CONFIG_ARCH_VERSATILE case was handled a total of 6 times.
This kills 5 of them.
Signed-off-by: Paul Mundt <[email protected]>
--
drivers/net/smc91x.h | 90 ---------------------------------------------------
1 file changed, 90 deletions(-)
Signed-off-by: Jeff Garzik <[email protected]>
The bus for this was removed entirely some time ago, as well as most
of the drivers that referenced it. maple_keyb seems to have been the
odd one out, and was still sitting in the source tree (though not
actually part of the build system). Kill off the rest of it..
Signed-off-by: Paul Mundt <[email protected]>
Signed-off-by: Dmitry Torokhov <[email protected]>
While working on SH kprobes, I noticed that avr32 got the preemption
handling wrong in the no probe case. The idea is that upon entry of
kprobe_handler() preemption is disabled outright across the life of the
kprobe, only to be re-enabled in post_kprobe_handler().
However, in the event that the probe is never activated, there's never any
chance of hitting the post probe handler, which allows for the current
avr32 implementation to disable preemption indefinitely, as it's currently
missing a re-enable when no probe is activated.
Signed-off-by: Paul Mundt <[email protected]>
Cc: Haavard Skinnemoen <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
Since some header inclusion paths were cleaned up, compilation
broke. Add in the headers we need directly to build again.
Signed-off-by: Paul Mundt <[email protected]>
When hugetlbpage support isn't enabled, this can be bogus.
Wrap it back in _PAGE_FLAGS_HARD to avoid changes to the
base PTE when not aiming for larger sizes.
Signed-off-by: Paul Mundt <[email protected]>
Paul Mundt