This patch:
- Switches mb/rmb/wmb back to being full-blown DMBs on ARM SMP systems,
since mb/rmb/wmb are required to order Normal memory accesses as well.
- Enables the use of DMB and ISB on XSC3 (which is an ARMv5TE ISA core
but conforms to the ARMv6 memory ordering model and supports the
various ARMv6 barriers.)
- Makes DMA coherent platforms (only ixp23xx at the moment) map
mb/rmb/wmb to dmb(), as on DMA coherent platforms, DMA consistent
mappings are done as Normal mappings, which are weakly ordered.
Signed-off-by: Lennert Buytenhek <[email protected]>
Acked-by: David Howells <[email protected]>
Acked-by: Catalin Marinas <[email protected]>
Acked-by: Paul E. McKenney <[email protected]>
Acked-by: Dan Williams <[email protected]>
Signed-off-by: Russell King <[email protected]>
On the n2100, both onboard r8169 ports exhibit PCI parity problems.
Set the ->broken_parity_status flag for both ports so that the r8169
drivers knows it should ignore error interrupts.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
In consistent_sync(), start + size can end up pointing one byte
beyond the end of the direct RAM mapping. We shouldn't BUG() when
this happens.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
This patch cleans up proc-xsc3:
- Correct a number of typos.
- Fix up indentation in a number of places.
- Change references to the various caches to be more clear about
whether we're talking about the L1 D, the L1 I or the unified L2
cache.
- Rename "drain write buffer" to "data write barrier", the official
name used in the Manzano manual.
- Change the xsc3 cpu name from "XScale-Core3" to "XScale-V3 based
processor".
Also, since a previously merged patch implements proper support for
using a MAC or iWMMXt coprocessor on xsc3 platforms, we no longer
need to enable access to CP0 on boot.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Move the setting of HWCAP_CRUNCH to kernel/crunch.c, where it belongs.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
If word 53 bit 1 isn't set, the maximum PIO mode is indicated by
the upper 8 bits of word 51, not the lower 8 bits. Fixes PIO mode
detection on old Compact Flash cards.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Jeff Garzik <[email protected]>
Fix incorrect IRQ numbering in arch-ep93xx/irqs.h (source: Applied
Data Systems 2.6.17 kernel tree.)
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Update the ep93xx, iop13xx, iop32x, iop33x, ixp2000, ixp23xx,
lpd270 and onearm defconfigs to 2.6.20-rc1.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Deepak Saxena has agreed to hand xsc3 maintainership over to me.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
On ixp23xx, it was thought to be necessary to disable coherency to work
around certain silicon errata. This turns out not to be the case --
none of the documented errata workarounds require disabling coherency,
and disabling coherency does not work around any existing errata.
Furthermore, all ixp23xx models do support coherency, so we should just
unconditionally enable coherency for all ixp23xx.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
The struct resource 'end' field is inclusive, the iop13xx flash
setup code got this wrong.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
The phys_io/io_pg_offst machine record variables were being set
to bogus values, causing problems when enabling DEBUG_LL.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add HWCAP_CRUNCH so that the dynamic linker knows whether it can
use Crunch-optimised libraries or not.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
The pl010 primecell documentation specifies that an error indicated via RSR
should be cleared by a write to ECR. We didn't do this, which was causing
errors to be re-reported on every call to pl010_rx_chars().
Doing a write to ECR once we detect an error appears to prevent the ep93xx
console UART driver from going into a mode where it reports "ttyAM0: X
input overrun(s)" every couple of keystrokes.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
The PCI master abort handling issue that affected ixp2000 also
affects ixp23xx.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add support for the Cirrus Logic EDB9302A Evaluation Board. Confirmed
to work by Chase Douglas.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)
Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch. Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.
CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.
This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.' This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.
These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: Lennert Buytenhek <[email protected]>
Acked-by: Dan Williams <[email protected]>
Signed-off-by: Russell King <[email protected]>
Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
Signed-off-by: Russell King <[email protected]>
The master abort check in ixp2000_pci_read_config() recently started
failing due to the compiler optimising out the read access following
the clearing of pci_master_aborts. Mark pci_master_aborts volatile to
force the compiler to reload it on every use.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add initial board support for the ADS Sphere board.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Flooding the console with error messages for every RX FIFO overrun,
checksum error and framing error isn't very sensible. Each of these
errors can occur during normal operation, so stop printk'ing error
messages for RX errors at all.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Jeff Garzik <[email protected]>
Ray Lehtiniemi reported that an incoming UDP packet flood can lock up
the ep93xx ethernet driver. Herbert Valerio Riedel noted that due to
the way ep93xx_eth manages the RX/TXstatus rings, it cannot distinguish
a full ring from an empty one, and correctly suggested that this was
likely to be causing this lockup to occur.
Instead of looking at the hardware's RX/TXstatus ring write pointers
to determine when to stop reading from those rings, we should just check
every individual RX/TXstatus descriptor's valid bit instead, since there
is no other way to distinguish an empty ring from a full ring, and if
there is a descriptor waiting, we take the hit of reading the descriptor
from memory anyway.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Jeff Garzik <[email protected]>
Thomas Gleixner noticed that bitops.h should also use the raw_* irq
disable/enable variants, and __xchg needs them as well.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add support for the IO-Data GLAN Tank, from Martin Michlmayr.
Signed-off-by: Martin Michlmayr <[email protected]>
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
gcc 4.1's __typeof__ propagates 'const', which breaks get_unaligned().
Rewrite get_unaligned() not to use __typeof__.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add one defconfig for all iop32x boards and one defconfig for all
iop33x boards.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Since the iop32x code isn't iop321-specific, and the iop33x code isn't
iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up
the code to conform to the coding style guidelines somewhat better.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Factor out the register defines for a number of other peripherals
common to the iop32x and iop33x.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Revamp the iop3xx board support: move the support code for each iop
board type into its own file, start using platform serial and platform
physmap flash devices, switch to a per-board time tick rate, and get
rid of the ARCH_EP80219 and STEPD config options by doing the relevant
checks at run time.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Squeeze three instructions out of the iop32x irq demuxer, and nine
out of the iop33x irq demuxer by using the hardware vector generator.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
The iop33x loadsp hunk in arch/arm/boot/compressed/head.S serves
no purpose -- remove it.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Implement the gpio_line_{config,get,set} API for iop3xx.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Get rid of the unused IOP3??_IRQ_OFS irq offset define, start IRQ
numbering from zero.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add CP6 enable/disable sequences to the timekeeping code and the IRQ
code. As a result, we can't depend on CP6 access being enabled when
we enter get_irqnr_and_base anymore, so switch the latter over to
using memory-mapped accesses for now.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Add macros to enable and disable access to CP6. On the iop3xx, enabling
CP6 access unfortunately also enables access to that coprocessor from
unprivileged code, so we need these macros to enable and disable access
to the coprocessor whenever we need to access it.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Switch the iop32x and iop33x code over to the common time implementation,
and remove the (nearly identical) iop32x and iop33x time implementations.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Merge and rewrite the iop32x/iop33x time code to do lost jiffy
tracking properly, and put the result in plat-iop/time.c.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Switch the iop32x and iop33x code over to the common PCI implementation,
and remove the (nearly identical) iop32x and iop33x PCI implementations.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Merge the iop32x PCI code and iop33x PCI code into plat-iop/pci.c.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Move the i2c bits shared between iop32x and iop33x to plat-iop/i2c.c
and include/asm-arm/hardware/iop3xx.h.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Introduce the arch/arm/plat-iop directory, for code shared between the
iop32x and iop33x, and move the common memory map setup bits there.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Split the iop3xx mach type into iop32x and iop33x -- split the config
symbols, and move the code in the mach-iop3xx directory to the mach-iop32x
and mach-iop33x directories.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Rename CONFIG_ARCH_IOP321 to CONFIG_ARCH_IOP32X and
CONFIG_ARCH_IOP331 to CONFIG_ARCH_IOP33X.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
On stepping A0/A1 of the 80200, invalidating D-cache by line doesn't
clear the dirty bits, which means that if we invalidate a dirty line,
the dirty data can still be written back to memory later on.
To work around this, dma_inv_range() on these two processors is
implemented as dma_flush_range() (i.e. do a clean D-cache line before
doing the invalidate D-cache line.) For this, we currently have a
processor ID check in xscale_dma_inv_range(), but a better solution
is to add a separate cache_fns and proc_info for A0/A1 80200.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Prevent userland from mapping in physical address regions >= 4G by
checking for that in valid_mmap_phys_addr_range().
Unfortunately, we cannot override valid_mmap_phys_addr_range() without
also overriding valid_phys_addr_range(), so copy drivers/char/mem.c's
version of valid_phys_addr_range() over to arch/arm/mm/mmap.c as well.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Now that we have raw_* variants of local_irq_$FOO(), switch the atomic
helpers over to use those raw_* variants. This is necessary when using
lockdep on pre-ARMv6 hardware, as lockdep uses atomic_t counters in the
trace_hardirqs_off() path.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
The Cirrus Logic ep93xx is an ARM SoC that includes an ethernet MAC
-- this patch adds a driver for that ethernet MAC.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Jeff Garzik <[email protected]>
The iq80310 mtd map driver depends on ARCH_IQ80310, which isn't
defined anywhere in the tree (as we don't have 80310 support), and
furthermore, everything the driver does can be done with physmap
instead.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: David Woodhouse <[email protected]>
Implement PM handling for physmap. Idea from Steven Scholz, patch
by David Anders.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: David Woodhouse <[email protected]>
Patch from Lennert Buytenhek
On armv4t systems, we have always compiled the kernel with -march=armv4
instead of -march=armv4t, which means that any use of bx will bomb out.
Commit ba9b5d7637 introduced the use of
bx in the kernel, which means we need to compile with -march=armv4t on
armv4t systems now.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Enabling PXA DMA for the smc91x on the logicpd pxa270 produces
unacceptable interference with the TFT panel, so disable it. Also
delete the lpd270 versions of the SMC_{in,out}[bl]() macros, as they
aren't used, since the board only supports 16bit accesses.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Jeff Garzik <[email protected]>
Patch from Lennert Buytenhek
The IOP 80219 xscale CPU is a stripped down version of the IOP32x.
But the fact that the 80219 and IOP32x are very similar doesn't mean
that they need to share a cpu table entry. It's also somewhat confusing
for the end user to see the 80219 reported as an IOP32x, so this patch
splits the IOP32x cpu table entry to make a separate entry for the
80219.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Since the ep93xx ohci bits are merged upstream now, enable ohci in
the ep93xx defconfig.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
This patch adds OHCI glue bits for the USB host interface in the
Cirrus ep93xx (arm920t) CPU.
Signed-off-by: Lennert Buytenhek <[email protected]>
Acked-by: David Brownell <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Newer ARMs have a 40 bit physical address space, but mapping physical
memory above 4G needs a special page table format which we (currently?) do
not use for userspace mappings, so what happens instead is that mapping an
address >= 4G will happily discard the upper bits and wrap.
There is a valid_mmap_phys_addr_range() arch hook where we could check for
>= 4G addresses and deny the mapping, but this hook takes an unsigned long
address:
static inline int valid_mmap_phys_addr_range(unsigned long addr, size_t size);
And drivers/char/mem.c:mmap_mem() calls it like this:
static int mmap_mem(struct file * file, struct vm_area_struct * vma)
{
size_t size = vma->vm_end - vma->vm_start;
if (!valid_mmap_phys_addr_range(vma->vm_pgoff << PAGE_SHIFT, size))
So that's not much help either.
This patch makes the hook take a pfn instead of a phys address.
Signed-off-by: Lennert Buytenhek <[email protected]>
Cc: Bjorn Helgaas <[email protected]>
Cc: "Luck, Tony" <[email protected]>
Cc: Russell King <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
Patch from Lennert Buytenhek
Commit ff0daca525 broke the SMP build,
this patch fixes it up again.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Analogous to the previous patch that allows ioremap() to use section
mappings, this patch allows ioremap() to use supersection mappings.
Original patch by Deepak Saxena.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch makes the iWMMXt context switch hook use the generic
thread notifier infrastructure that was recently merged in commit
d6551e884c.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch adds support for the Cirrus Logic EDB9315A, an evaluation
board based on the Cirrus Logic EP9315 SoC, with 64M RAM, two USB host
ports, audio in/out, three serial ports, 10/100 ethernet, and IDE, VGA,
and LCD interfaces.
The EDB9315A is a low-cost version of the EDB9315, and has only 16M
of NOR flash, while the EDB9315 has 32M.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch adds support for the Cirrus Logic EDB9302, an evaluation
board based on the Cirrus Logic EP9302 SoC, with 32M RAM, one USB host
port, audio in/out, two serial ports and a 10/100 ethernet interface.
George Kashperko submitted the original patch, this patch is a rewrite
using the newer physmap platform driver.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
The bootloader on the LogicPD PXA270 platform informs the kernel of
which type of TFT screen is connected via an lcd=$FOO kernel command
line parameter.
Before this patch, we ignored this parameter and just hardcoded the use
of the Sharp lq64d343 display kit. This patch implement parsing of the
command line option, and chooses the right pxafb_mach_info to use (six
choices) based on this command line option.
Also fix the fb settings to correspond with those of the bootloader.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch adds support for the Cirrus Logic EDB9315, an evaluation
board based on the Cirrus Logic EP9315 SoC, with 64M RAM, two USB host
ports, audio in/out, three serial ports, 10/100 ethernet, and IDE, VGA,
and LCD interfaces.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Add the necessary kernel bits for crunch task switching.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch makes it possible to get/set a task's Crunch state via
the ptrace(2) system call.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch makes the kernel save Crunch state in userland signal frames,
so that any userland signal handler can safely use the Crunch coprocessor
without corrupting the Crunch state of the code it preempted.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
ixp23xx was including asm/hardware.h in its version of uncompress.h,
to get at the physical address of the debug UART, but this include was
causing various inline functions that are totally unrelated to the
decompressor, defined in headers in include/asm-arm/arch-ixp23xx, to
be included in the decompressor image.
Include asm/arch/ixp23xx.h instead, and move the sole inline function
in ixp23xx.h to another header.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch adds support for the Ajeco 1ARM Single Board Computer, a
VME form factor SBC based on the Atmel AT91 SoC, with 64M RAM, seven
serial ports, three ethernet ports, IDE, CF, USB host and device,
and S-Video/VGA out.--
Signed-off-by: Lennert Buytenhek <[email protected]>Signed-off-by: Andrew Victor <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
The ep93xx ohci bits have been merged into the gregkh-2.6 tree, which
means that they will probably go upstream soon, so make the core ep93xx
code instantiate an appropriate ep93xx-ohci platform device.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Add an initial implementation of the clk_* API for the cirrus ep93xx
to the tree. The initial implementation is somewhat minimal, with the
intention of extending it as we go along.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Commit d6551e884c forgot to update the
description of what goes into r2 when calling iwmmxt_task_restore().
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
This patch allows the ixp2000 uengine loader that is already in the
tree to also be used on the ixp23xx.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
As it's slightly nontrivial to make it possible to build a single
kernel image for both the mainstone and the logicpd pxa270 card engine,
add a separate defconfig for the logicpd pxa270 card engine for now.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
The tick rate of timers 1-3 isn't exactly 508 kHz as some parts of the
relevant documentation claim, but more like 508.469 kHz (14.7456 MHz
divided by 29.)
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
A couple of platforms aren't using the right comparison type in their
timer interrupt handlers (as we're comparing two wrapping timestamps,
we need a bmi/bpl-type comparison, not an unsigned comparison) -- this
patch fixes them up.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Now that the physmap platform device rewrite is in, make the ixp23xx
boards use platform devices for physmap flash.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Now that the physmap platform device rewrite is in, make the ep93xx
boards use platform devices for physmap flash.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
Fix two typos in include/asm-arm/arch-ixp23xx.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
The cirrus ep93xx has 3 pl010 UARTs, while amba-pl010.c only allows
for 2 by default. A while ago, I think we agreed on changing the 2
to 8, but I don't see this in 2.6.17 yet.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
From: Lennert Buytenhek <[email protected]>
The recent renaming of m48t86's ->readb() and ->writeb() platform driver
methods (2d7b20c188) to ->readbyte() and
->writebyte() to fix the ia64 build broke the build of the cirrus ep93xx
ARM platform. This patch fixes it up.
Signed-off-by: Lennert Buytenhek <[email protected]>
Cc: Alessandro Zummo <[email protected]>
Cc: Russell King <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
Patch from Lennert Buytenhek
On the ixp23xx, the microengine thread interrupt sources are numbered
56..119, but their mask/status bits are located in bit positions 64..127
in the various registers in the interrupt controller (bit positions
56..63 are unused.)
We don't deal with this, so currently, when asked to enable IRQ 64, we
will enable IRQ 56 instead.
The only interrupts >= 64 are the thread interrupt sources, and there
are no in-tree users of those yet, so this is fortunately not a big
problem, but this needs fixing anyway.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
Patch from Lennert Buytenhek
The current __ixp23xx_arch_is_coherent() check assumes that the
lower byte of IXP23XX_PRODUCT_ID is identical to the lower byte of
processor_id, but this is not the case, and because of this we were
incorrectly enabling coherency on A1 stepping CPUs.
Stepping A1 of the ixp2350, which has a PRODUCT_ID of 0x401, has '02'
in the lower byte of processor_id, while A2, with a PRODUCT_ID of
0x402, has '04' in the lower byte of processor_id.
So, to check for >= A2, we really need to check the lower byte of
processor_id against >= 4.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
three gigabit ports, but some enp2611 models only have two ports
(and only one onboard PM3386.) The current driver assumes there
are always three ports and so it doesn't work on the two-port
version of the board at all.
This patch adds a bit of logic to the enp2611 driver to limit the
number of ports to 2 if the second PM3386 isn't detected.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Stephen Hemminger <[email protected]>
After dwmw2 let me know it ought to be done, I rewrote the physmap map
driver to be a platform driver. I know zilch about the driver model,
so I probably botched it in some way, but I've done some tests on an
ixp23xx board which uses physmap, and it all seems to work.
In order to not break existing physmap users, I've added some compat
code that will instantiate a platform device iff CONFIG_MTD_PHYSMAP_LEN
is defined and != 0. Also, I've changed the default value for
CONFIG_MTD_PHYSMAP_LEN to zero, so that people who inadvertently
compile in physmap (or new, platform-style, users of physmap) don't get
burned.
This works pretty well -- the new physmap driver is a drop-in replacement
for the old one, and works on said ixp23xx board without any code changes
needed. (This should hold as long as users don't touch 'physmap_map'
directly.)
Once all physmap users have been converted to instantiate their own
platform devices, the compat code can go. (Or we decide that we can
change all the in-tree users at the same time, and never merge the
compat code.)
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: David Woodhouse <[email protected]>
The TS-72xx is a series of embedded single board computers from
Technologic Systems based on the Cirrus ep93xx (arm920t based) CPU.
The TS-7200 uses NOR flash, while all the other models in the series
(TS-7250, TS-7260) use NAND flash -- included is a driver for the NAND
flash on those boards.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: David Woodhouse <[email protected]>
Lennert Buytenhek