Commit Graph
1030923 Commits
Author SHA1 Message Date
Christian König 9deb0b3dcf drm/amdgpu: use the preferred pin domain after the check
For some reason we run into an use case where a BO is already pinned
into GTT, but should be pinned into VRAM|GTT again.

Handle that case gracefully as well.

Reviewed-by: Shashank Sharma <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
2021-08-20 12:09:32 -04:00
Evan Quan 8ac1696b1d drm/amd/pm: a quick fix for "divided by zero" error
Considering Arcturus is a dedicated ASIC for computing, it
will be more proper to drop the support for fan speed reading
and setting. That's on the TODO list.

Signed-off-by: Evan Quan <[email protected]>
Reported-by: Rui Teng <[email protected]>
Reviewed-by: Guchun Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-20 12:06:14 -04:00
Lukas Bulwahn 36a7aee027 drm: amdgpu: remove obsolete reference to config CHASH
Commit 04ed8459f3 ("drm/amdgpu: remove chash") removes the chash
architecture and its corresponding config CHASH.

There is still a reference to CHASH in the config DRM_AMDGPU in
./drivers/gpu/drm/Kconfig.

Remove this obsolete reference to config CHASH.

Signed-off-by: Lukas Bulwahn <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:26:10 -04:00
Colin Ian King c94126c4aa drm/amd/pm: Fix spelling mistake "firwmare" -> "firmware"
There is a spelling mistake in a dev_err error message. Fix it.

Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:26:10 -04:00
YuBiao Wang 691191a2f4 drm/amd/amdgpu:flush ttm delayed work before cancel_sync
[Why]
In some cases when we unload driver, warning call trace
will show up in vram_mgr_fini which claims that LRU is not empty, caused
by the ttm bo inside delay deleted queue.

[How]
We should flush delayed work to make sure the delay deleting is done.

Signed-off-by: YuBiao Wang <[email protected]>
Reviewed-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:23:00 -04:00
Candice Li ce97f37be8 drm/amd: consolidate TA shared memory structures
Signed-off-by: Candice Li <[email protected]>
Reviewed-by: John Clements <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:22:53 -04:00
Hawking Zhang f2bd514d85 drm/amdgpu: increase max xgmi physical node for aldebaran
aldebaran supports up to 16 xgmi physical nodes.

Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: John Clements <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:22:46 -04:00
Evan Quan 42447deb88 drm/amdgpu: disable BACO support for 699F:C7 polaris12 SKU temporarily
We have a S3 issue on that SKU with BACO enabled. Will bring back this
when that root caused.

Signed-off-by: Evan Quan <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Reviewed-by: Guchun Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:22:25 -04:00
Zhan Liu 65c7e943ea drm/amd/display: Use DCN30 watermark calc for DCN301
[why]
dcn301_calculate_wm_and_dl() causes flickering when external monitor is
connected.

This issue has been fixed before by commit 0e4c0ae59d
("drm/amdgpu/display: drop dcn301_calculate_wm_and_dl for now"), however
part of the fix was gone after commit 2cbcb78c9e ("Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next").

[how]
Use dcn30_calculate_wm_and_dlg() instead as in the original fix.

Fixes: 2cbcb78c9e ("Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next")

Signed-off-by: Nikola Cornij <[email protected]>
Reviewed-by: Zhan Liu <[email protected]>
Tested-by: Zhan Liu <[email protected]>
Tested-by: Oliver Logush <[email protected]>
Signed-off-by: Zhan Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:22:25 -04:00
Zhigang Luo 424f2b2e26 drm/amdgpu: correct MMSCH 1.0 version
MMSCH 1.0 doesn't have major/minor version, only verison.

Signed-off-by: Zhigang Luo <[email protected]>
Reviewed by Shaoyun.liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:22:25 -04:00
Jonathan Kim 44357a1bd5 drm/amdgpu: get extended xgmi topology data
The TA has a limit to the amount of data that can be retrieved from
GET_TOPOLOGY.  For setups that exceed this limit, the xGMI topology
needs to be re-initialized and data needs to be re-fetched from the
extended link records by setting a flag in the shared command buffer.

The number of hops and the number of links must be accumulated by the
driver. Other data points are all fetched from the first request.
Because the TA has already exceeded its link record limit, it
cannot hold bidirectional information.  Otherwise the driver would
have to do more than two fetches so the driver has to reflect the
topology information in the opposite direction.

v2: squashed with internal reviewed fix

Signed-off-by: Jonathan Kim <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-18 18:22:24 -04:00
Nathan Chancellor 3a6e4106a8 drm/radeon: Add break to switch statement in radeonfb_create_pinned_object()
Clang + -Wimplicit-fallthrough warns:

drivers/gpu/drm/radeon/radeon_fb.c:170:2: warning: unannotated
fall-through between switch labels [-Wimplicit-fallthrough]
        default:
        ^
drivers/gpu/drm/radeon/radeon_fb.c:170:2: note: insert 'break;' to avoid
fall-through
        default:
        ^
        break;
1 warning generated.

Clang's version of this warning is a little bit more pedantic than
GCC's. Add the missing break to satisfy it to match what has been done
all over the kernel tree.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Nathan Chancellor <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 16:14:12 -04:00
Aric Cyr 571ca8de53 drm/amd/display: 3.2.149
This version brings along following fixes:
- Ensure DCN save init registers after VM setup
- Fix multi-display support for idle opt workqueue
- Use vblank control events for PSR enable/disable
- Create default dc_sink when fail reading EDID under MST

Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 16:14:12 -04:00
Anthony Koo 01934c30c0 drm/amd/display: [FW Promotion] Release 0.0.79
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 16:14:12 -04:00
Nicholas Kazlauskas 961606872a drm/amd/display: Guard vblank wq flush with DCN guards
[Why]
Compilation of the workqueue fails if not building with the DCN config
option set.

[How]
Guard calls to the flush with the DCN config option to fix the build.

Reviewed-by: Roman Li <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 16:14:12 -04:00
Jake Wang f586fea897 drm/amd/display: Ensure DCN save after VM setup
[Why]
DM initializes VM context after DMCUB initialization.
This results in loss of DCN_VM_CONTEXT registers after z10.

[How]
Notify DMCUB when VM setup is complete, and have DMCUB
save init registers.

v2: squash in CONFIG_DRM_AMD_DC_DCN3_1 fix

Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Jake Wang <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 16:14:12 -04:00
Nicholas Kazlauskas 58aa1c50e5 drm/amd/display: Use vblank control events for PSR enable/disable
[Why]
PSR can disable the HUBP along with the OTG when PSR is active.

We'll hit a pageflip timeout when the OTG is disable because we're no
longer updating the CRTC vblank counter and the pflip high IRQ will
not fire on the flip.

In order to flip the page flip timeout occur we should modify the
enter/exit conditions to match DRM requirements.

[How]
Use our deferred handlers for DRM vblank control to notify DMCU(B)
when it can enable or disable PSR based on whether vblank is disabled or
enabled respectively.

We'll need to pass along the stream with the notification now because
we want to access the CRTC state while the CRTC is locked to get the
stream state prior to the commit.

Retain a reference to the stream so it remains safe to continue to
access and release that reference once we're done with it.

Enable/disable logic follows what we were previously doing in
update_planes.

The workqueue has to be flushed before programming streams or planes
to ensure that we exit out of idle optimizations and PSR before
these events occur if necessary.

To keep the skip count logic the same to avoid FBCON PSR enablement
requires copying the allow condition onto the DM IRQ parameters - a
field that we can actually access from the worker.

Reviewed-by: Roman Li <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Nicholas Kazlauskas 09a5df6c44 drm/amd/display: Fix multi-display support for idle opt workqueue
[Why]
The current implementation for idle optimization support only has a
single work item that gets reshuffled into the system workqueue
whenever we receive an enable or disable event.

We can have mismatched events if the work hasn't been processed or if
we're getting control events from multiple displays at once.

This fixes this issue and also makes the implementation usable for
PSR control - which will be addressed in another patch.

[How]
We need to be able to flush remaining work out on demand for driver stop
and psr disable so create a driver specific workqueue instead of using
the system one. The workqueue will be single threaded to guarantee the
ordering of enable/disable events.

Refactor the queue to allocate the control work and deallocate it
after processing it.

Pass the acrtc directly to make it easier to handle psr enable/disable
in a later patch.

Rename things to indicate that it's not just MALL specific.

Reviewed-by: Roman Li <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Wayne Lin 58de0ef214 drm/amd/display: Create dc_sink when EDID fail
[Why]
While reading remote EDID via Startech 1-to-4 hub, occasionally we
won't get response in time and won't light up corresponding monitor.

Ideally, we can still add generic modes for userspace to choose to try
to light up the monitor and which is done in
drm_helper_probe_single_connector_modes(). So the main problem here is
that we fail .mode_valid since we don't create remote dc_sink for this
case.

[How]
Also add default dc_sink if we can't get the EDID.

Reviewed-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Wayne Lin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan b64625a303 drm/amd/pm: correct the address of Arcturus fan related registers
These registers have different address from other SMU V11 ASICs.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan bc08cab690 drm/amd/pm: drop unnecessary manual mode check
As the fan control was guarded under manual mode before fan speed
RPM/PWM setting. Thus the extra check is totally redundant.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan 0d8318e112 drm/amd/pm: drop the unnecessary intermediate percent-based transition
Currently, the readout of fan speed pwm is transited into percent-based
and then pwm-based. However, the transition into percent-based is totally
unnecessary and make the final output less accurate.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan d9ca7567b8 drm/amd/pm: correct the fan speed RPM retrieving
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan fb1f667e71 drm/amd/pm: correct the fan speed PWM retrieving
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed PWM.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan 96401f7c21 drm/amd/pm: record the RPM and PWM based fan speed settings
As the relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, both the RPM and PWM
settings need to be saved.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Evan Quan f3289d0497 drm/amd/pm: correct the fan speed RPM setting
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
perform the fan speed RPM setting.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:56 -04:00
Candice Li 893cf382c0 drm/amd/amdgpu: remove unnecessary RAS context field
Delete ras_if->name in the RAS ctx structure and remove related lines.

Signed-off-by: Candice Li <[email protected]>
Reviewed-by: John Clements <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:35:55 -04:00
Yifan Zhang 2bbab7ce7c drm/amdkfd: fix random KFDSVMRangeTest.SetGetAttributesTest test failure
KFDSVMRangeTest.SetGetAttributesTest randomly fails in stress test.

Note: Google Test filter = KFDSVMRangeTest.*
[==========] Running 18 tests from 1 test case.
[----------] Global test environment set-up.
[----------] 18 tests from KFDSVMRangeTest
[ RUN      ] KFDSVMRangeTest.BasicSystemMemTest
[       OK ] KFDSVMRangeTest.BasicSystemMemTest (30 ms)
[ RUN      ] KFDSVMRangeTest.SetGetAttributesTest
[          ] Get default atrributes
/home/yifan/brahma/libhsakmt/tests/kfdtest/src/KFDSVMRangeTest.cpp:154: Failure
Value of: expectedDefaultResults[i]
  Actual: 4294967295
Expected: outputAttributes[i].value
Which is: 0
/home/yifan/brahma/libhsakmt/tests/kfdtest/src/KFDSVMRangeTest.cpp:154: Failure
Value of: expectedDefaultResults[i]
  Actual: 4294967295
Expected: outputAttributes[i].value
Which is: 0
/home/yifan/brahma/libhsakmt/tests/kfdtest/src/KFDSVMRangeTest.cpp:152: Failure
Value of: expectedDefaultResults[i]
  Actual: 4
Expected: outputAttributes[i].type
Which is: 2
[          ] Setting/Getting atrributes
[  FAILED  ]

the root cause is that svm work queue has not finished when svm_range_get_attr is called, thus
some garbage svm interval tree data make svm_range_get_attr get wrong result. Flush work queue before
iterate svm interval tree.

Signed-off-by: Yifan Zhang <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:19:08 -04:00
Kenneth Feng 3919a48518 drm/amd/pm: change the workload type for some cards
change the workload type for some cards as it is needed.

Signed-off-by: Kenneth Feng <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:18:58 -04:00
Kenneth Feng fe122ee542 Revert "drm/amd/pm: fix workload mismatch on vega10"
This reverts commit 0979d43259.
Revert this because it does not apply to all the cards.

Signed-off-by: Kenneth Feng <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:18:13 -04:00
Candice Li 6457205c07 drm/amd/amdgpu: consolidate PSP TA context
Signed-off-by: Candice Li <[email protected]>
Reviewed-by: John Clements <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:18:04 -04:00
Jiange Zhao 3e183e2fae drm/amdgpu: Add MB_REQ_MSG_READY_TO_RESET response when VF get FLR notification.
When guest received FLR notification from host, it would
lock adapter into reset state. There will be no more
job submission and hardware access after that.

Then it should send a response to host that it has prepared
for host reset.

Signed-off-by: Jiange Zhao <[email protected]>
Signed-off-by: Peng Ju Zhou <[email protected]>
Reviewed-by: Emily.Deng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:17:57 -04:00
Kevin Wang 1d0e622f8d drm/amd/pm: change pp_dpm_sclk/mclk/fclk attribute is RO for aldebaran
the following clock is only support voltage DPM, change attribute to RO:
1. pp_dpm_sclk
2. pp_dpm_mclk
3. pp_dpm_fclk

Signed-off-by: Kevin Wang <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:17:51 -04:00
Kevin Wang becf6c9552 drm/amd/pm: change smu msg's attribute to allow working under sriov
the following message is allowed in sriov mode:
1. GetEnabledSmuFeaturesLow
2. GetEnabledSmuFeaturesHigh

Signed-off-by: Kevin Wang <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:17:44 -04:00
Kevin Wang cb5da84a5f drm/amd/pm: change return value in aldebaran_get_power_limit()
v1:
1. change return value to avoid smu driver probe fails when FEATURE_PPT is
not enabled.
2. if FEATURE_PPT is not enabled, set power limit value to 0.

v2:
instead dev_err with dev_warn

Signed-off-by: Kevin Wang <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:17:35 -04:00
Kevin Wang 4a1cac2559 drm/amd/pm: skip to load smu microcode on sriov for aldebaran
v1:
1. skip to load smu firmware in sriov mode for aldebaran chip
2. using vbios pptable if in sriov mode.

v2:
clean up smu driver code in sriov code path

Signed-off-by: Kevin Wang <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:17:29 -04:00
Kevin Wang 19838cbae7 drm/amd/pm: correct DPM_XGMI/VCN_DPM feature name
the following feature is wrong, it will cause sysnode of pp_features show error:
1. DPM_XGMI
2. VCN_DPM

Signed-off-by: Kevin Wang <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:17:17 -04:00
Jack Zhang c530b02f39 drm/amd/amdgpu embed hw_fence into amdgpu_job
Why: Previously hw fence is alloced separately with job.
It caused historical lifetime issues and corner cases.
The ideal situation is to take fence to manage both job
and fence's lifetime, and simplify the design of gpu-scheduler.

How:
We propose to embed hw_fence into amdgpu_job.
1. We cover the normal job submission by this method.
2. For ib_test, and submit without a parent job keep the
legacy way to create a hw fence separately.
v2:
use AMDGPU_FENCE_FLAG_EMBED_IN_JOB_BIT to show that the fence is
embedded in a job.
v3:
remove redundant variable ring in amdgpu_job
v4:
add tdr sequence support for this feature. Add a job_run_counter to
indicate whether this job is a resubmit job.
v5
add missing handling in amdgpu_fence_enable_signaling

Signed-off-by: Jingwen Chen <[email protected]>
Signed-off-by: Jack Zhang <[email protected]>
Reviewed-by: Andrey Grodzovsky <[email protected]>
Reviewed by: Monk Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-16 15:16:58 -04:00
Tuo Li 554594567b drm/display: fix possible null-pointer dereference in dcn10_set_clock()
The variable dc->clk_mgr is checked in:
  if (dc->clk_mgr && dc->clk_mgr->funcs->get_clock)

This indicates dc->clk_mgr can be NULL.
However, it is dereferenced in:
    if (!dc->clk_mgr->funcs->get_clock)

To fix this null-pointer dereference, check dc->clk_mgr and the function
pointer dc->clk_mgr->funcs->get_clock earlier, and return if one of them
is NULL.

Reported-by: TOTE Robot <[email protected]>
Signed-off-by: Tuo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-11 17:19:54 -04:00
Tuo Li a211260c34 gpu: drm: amd: amdgpu: amdgpu_i2c: fix possible uninitialized-variable access in amdgpu_i2c_router_select_ddc_port()
The variable val is declared without initialization, and its address is
passed to amdgpu_i2c_get_byte(). In this function, the value of val is
accessed in:
  DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n",
       addr, *val);

Also, when amdgpu_i2c_get_byte() returns, val may remain uninitialized,
but it is accessed in:
  val &= ~amdgpu_connector->router.ddc_mux_control_pin;

To fix this possible uninitialized-variable access, initialize val to 0 in
amdgpu_i2c_router_select_ddc_port().

Reported-by: TOTE Robot <[email protected]>
Signed-off-by: Tuo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-11 17:19:54 -04:00
Mukul Joshi b53ef0df1b drm/amdkfd: CWSR with software scheduler
This patch adds support to program trap handler settings
when loading driver with software scheduler (sched_policy=2).

Signed-off-by: Mukul Joshi <[email protected]>
Suggested-by: Jay Cornwall <[email protected]>
Reviewed-by: Harish Kasiviswanathan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-11 17:19:54 -04:00
Philip Yang eff8cbf096 drm/amdkfd: AIP mGPUs best prefetch location for xnack on
For xnack on, if range ACCESS or ACCESS_IN_PLACE (AIP) by single GPU, or
range is ACCESS_IN_PLACE by mGPUs and all mGPUs connection on XGMI same
hive, the best prefetch location is prefetch_loc GPU. Otherwise, the best
prefetch location is always CPU because GPU does not have coherent
mapping VRAM of other GPUs even with large-BAR PCIe connection.

Signed-off-by: Philip Yang <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-11 17:19:54 -04:00
Ryan Taylor f5bd523988 drm/amd/pm: graceful exit on restore fan mode failure (v2)
Attempt od settings restore and disable restore flag on restore fan mode
failure.

v2: Update fan mode to auto and fan speed to zero (Lijo)

Reviewed-by: Lijo Lazar <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Ryan Taylor <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-11 17:18:26 -04:00
Ryan Taylor 5d58f1a52b drm/amd/pm: restore fan_mode AMD_FAN_CTRL_NONE on resume (v2)
Adds missing edge case to smu_restore_dpm_user_profile.

v2: Don't restore fan mode auto (Lijo)

Reviewed-by: Lijo Lazar <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Ryan Taylor <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-11 17:18:13 -04:00
Darren Powell fdf8eea5d3 amdgpu/pm: Replace amdgpu_pm usage of sprintf with sysfs_emit
replacing printfs with sysfs_emit

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pwm1_enable
pwm1_min
pwm1_max
pwm1
fan1_input
fan1_target
fan1_enable
power1_cap_min "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-10 10:35:13 -04:00
Darren Powell 6db0c87a0a amdgpu/pm: Replace hwmgr smu usage of sprintf with sysfs_emit
replacing printfs with sysfs_emit
 minor smu7 change to remove compiler warning comparison of int and uint32_t
 minor smu8 change to remove compiler warning comparison of int and uint32_t

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-10 10:35:07 -04:00
Darren Powell 0b023410da amdgpu/pm: Replace vega12,20 usage of sprintf with sysfs_emit
=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_features
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-10 10:35:01 -04:00
Darren Powell 21f0742af1 amdgpu/pm: Replace vega10 usage of sprintf with sysfs_emit
initial modification of files
  vega10_hwmgr.c

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_features
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-10 10:34:55 -04:00
Darren Powell e738c2f0e6 amdgpu/pm: Replace smu12/13 usage of sprintf with sysfs_emit
initial modification of files
  renoir_ppt.c
  aldebaran_ppt.c
  yellow_carp_ppt.c

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-10 10:34:50 -04:00
Darren Powell fe14c2859f amdgpu/pm: Replace smu11 usage of sprintf with sysfs_emit
modification of smu11 files
  arcturus_ppt.c
  sienna_cichlid_ppt.c
  vangogh_ppt.c

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-08-10 10:34:44 -04:00