Commit Graph
1199824 Commits
Author SHA1 Message Date
Dmitry Baryshkov b7fd5d19e3 dt-bindings: clock: provide separate bindings for qcom,gcc-mdm9615
The global clock controller on MDM9615 uses external CXO and PLL7
clocks. Split the qcom,gcc-mdm9615 to the separate schema file.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-31 14:24:04 -07:00
Dmitry Baryshkov 9f08d33496 dt-bindings: clock: drop qcom,lcc-mdm9615 header file
The header file for qcom,lcc-mdm9615 and qcom,lcc-msm8960 is the same
(as well as the drivers). Drop the qcom,lcc-mdm9615.h in favour of
qcom,lcc-msm8960.h

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-31 14:23:19 -07:00
Dmitry Baryshkov 83490976a7 dt-bindings: clock: qcom,lcc.yaml: describe clocks for lcc,qcom-mdm9615
Describe parent clocks used by the LCC on the MDM9615 platform. It is
the list as the one for msm8960/apq8064, with only difference being
pxo/cxo replacement.

Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-31 14:23:19 -07:00
Konrad Dybcio e5e527d1ed clk: qcom: videocc-sm8350: Add SC8280XP support
SC8280XP, being a partial derivative of SM8350, shares almost the exact
same videocc block. Extend the 8350 driver to support the bigger brother.

The only notable changes are higher possible frequencies on some clocks
and some switcheroo within the XO/sleep registers (probably due to some
different board crystal configuration).

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-31 14:15:44 -07:00
Konrad Dybcio dfe488d99d dt-bindings: clock: qcom,sm8350-videocc: Add SC8280XP
SC8280XP reuses the SM8350 video clock controller block, changing just a
couple tunables. Docuemnt it.

Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-31 14:15:44 -07:00
Konrad Dybcio 20e1d75bc0 clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs
The DISP_CC GDSCs have not been instructed to use the ret registers.
Fix that.

Fixes: 4a66e76fdb ("clk: qcom: Add SC8280XP display clock controller")
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-27 20:28:15 -07:00
Johan Hovold a9f71a0335 clk: qcom: turingcc-qcs404: fix missing resume during probe
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.

Fixes: 892df0191b ("clk: qcom: Add QCS404 TuringCC")
Cc: [email protected]      # 5.2
Cc: Bjorn Andersson <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:50 -07:00
Johan Hovold e2349da0fa clk: qcom: mss-sc7180: fix missing resume during probe
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.

Fixes: 8def929c40 ("clk: qcom: Add modem clock controller driver for SC7180")
Cc: [email protected]      # 5.7
Cc: Taniya Das <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:50 -07:00
Johan Hovold 97112c83f4 clk: qcom: q6sstop-qcs404: fix missing resume during probe
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.

Fixes: 6cdef2738d ("clk: qcom: Add Q6SSTOP clock controller for QCS404")
Cc: [email protected]      # 5.5
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:50 -07:00
Johan Hovold 66af5339d4 clk: qcom: lpasscc-sc7280: fix missing resume during probe
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.

Fixes: 4ab43d1711 ("clk: qcom: Add lpass clock controller driver for SC7280")
Cc: [email protected]      # 5.16
Cc: Taniya Das <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:50 -07:00
Johan Hovold 10192ab375 clk: qcom: gcc-sc8280xp: fix runtime PM imbalance on probe errors
Make sure to decrement the runtime PM usage count before returning in
case RCG dynamic frequency switch initialisation fails.

Fixes: 2a541abd98 ("clk: qcom: gcc-sc8280xp: Add runtime PM")
Cc: Konrad Dybcio <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:49 -07:00
Johan Hovold acaf1b3296 clk: qcom: dispcc-sm8550: fix runtime PM imbalance on probe errors
Make sure to decrement the runtime PM usage count before returning in
case regmap initialisation fails.

Fixes: 90114ca114 ("clk: qcom: add SM8550 DISPCC driver")
Cc: [email protected]      # 6.3
Cc: Neil Armstrong <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:49 -07:00
Johan Hovold b0f3d01bda clk: qcom: dispcc-sm8450: fix runtime PM imbalance on probe errors
Make sure to decrement the runtime PM usage count before returning in
case regmap initialisation fails.

Fixes: 16fb89f92e ("clk: qcom: Add support for Display Clock Controller on SM8450")
Cc: [email protected]      # 6.1
Cc: Dmitry Baryshkov <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:49 -07:00
Johan Hovold c948ff727e clk: qcom: camcc-sc7180: fix async resume during probe
To make sure that the controller is runtime resumed and its power domain
is enabled before accessing its registers during probe, the synchronous
runtime PM interface must be used.

Fixes: 8d4025943e ("clk: qcom: camcc-sc7180: Use runtime PM ops instead of clk ones")
Cc: [email protected]      # 5.11
Cc: Stephen Boyd <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-18 07:58:49 -07:00
Bjorn Andersson ad4e807f5f Merge branch '[email protected]' into clk-for-6.6
This series reshuffles things around, moving the management of SMD RPM
bus clocks to the interconnect framework where they belong. This helps
us solve a couple of issues:

1. We can work towards unused clk cleanup of RPMCC without worrying
   about it killing some NoC bus, resulting in the SoC dying.
   Deasserting actually unused RPM clocks (among other things) will
   let us achieve "true SoC-wide power collapse states", also known as
   VDD_LOW and VDD_MIN.

2. We no longer have to keep tons of quirky bus clock ifs in the icc
   driver. You either have a RPM clock and call "rpm set rate" or you
   have a single non-RPM clock (like AHB_CLK_SRC) or you don't have any.

3. There's less overhead - instead of going through layers and layers of
   the CCF, ratesetting comes down to calling max() and sending a single
   RPM message. ICC is very very dynamic so that's a big plus.

The clocks still need to be vaguely described in the clk-smd-rpm driver,
as it gives them an initial kickoff, before actually telling RPM to
enable DVFS scaling.  After RPM receives that command, all clocks that
have not been assigned a rate are considered unused and are shut down
in hardware, leading to the same issue as described in point 1.

We can consider marking them __initconst in the future, but this series
is very fat even without that..

Apart from that, it squashes a couple of bugs that really need fixing..

The series is merged through a topic branch to manage the dependencies
between interconnect, Qualcomm clocks and Qualcomm SoC.
2023-07-15 10:03:15 -07:00
Konrad Dybcio 17fc623e0f interconnect: qcom: icc-rpm: Fix bandwidth calculations
Up until now, we've been aggregating the bandwidth values and only
dividing them by the bus width of the source node. This was completely
wrong, as different nodes on a given path may (and usually do) have
varying bus widths.  That in turn, resulted in the calculated clock rates
being completely bogus - usually they ended up being much higher, as
NoC_A<->NoC_B links are very wide.

Since we're not using the aggregate bandwidth value for anything other
than clock rate calculations, remodel qcom_icc_bus_aggregate() to
calculate the per-context clock rate for a given provider, taking into
account the bus width of every individual node.

Fixes: 30c8fa3ec6 ("interconnect: qcom: Add MSM8916 interconnect provider driver")
Reported-by: Stephan Gerhold <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 3b7480106b interconnect: qcom: icc-rpm: Set correct bandwidth through RPM bw req
Currently, we're setting the aggregated-on-provider bandwidth on each
node, individually. That is of course incorrect and results in far too
high votes. Use the correct values to ensure we're not wasting power.

Fixes: 30c8fa3ec6 ("interconnect: qcom: Add MSM8916 interconnect provider driver")
Reported-by: Stephan Gerhold <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 32846c4a8f interconnect: qcom: icc-rpm: Set bandwidth on both contexts
Up until now, for some reason we've only been setting bandwidth values
on the active-only context. That pretty much meant that RPM could lift
all votes when entering sleep mode. Or never sleep at all.

That in turn could potentially break things like USB wakeup, as the
connection between APSS and SNoC/PNoC would simply be dead.

Set the values appropriately.

Fixes: 30c8fa3ec6 ("interconnect: qcom: Add MSM8916 interconnect provider driver")
Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 6ed0e5e60e interconnect: qcom: icc-rpm: Fix bucket number
SMD RPM only provides two buckets, one each for the active-only and
active-sleep RPM contexts. Use the correct constant to allocate and
operate on them.

This will make the qcom,icc.h header no longer work with this driver,
mostly because.. it was never meant to! The commit that introduced
bucket support to SMD RPM was trying to shove a square into a round
hole and it did not work out very well. That said, there are no
active users of SMD RPM ICC + qcom,icc.h, so that doesn't hurt.

Fixes: dcbce7b0a7 ("interconnect: qcom: icc-rpm: Support multiple buckets")
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio d6edc31f3a clk: qcom: smd-rpm: Separate out interconnect bus clocks
The interconnect bus clocks are now handled within the ICC framework.
They still however need to get a kickstart *before* we call
clk_smd_rpm_enable_scaling(), or RPM will assume that they should all
be running at 0 kHz and the system will inevitably die.

Separate them out to ensure such a kickstart can still take place.

As a happy accident, the file got smaller:

Total: Before=41951, After=41555, chg -0.94%

Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 11f63efe58 interconnect: qcom: icc-rpm: Control bus rpmcc from icc
The sole purpose of bus clocks that were previously registered with
rpmcc was to convey the aggregated bandwidth to RPM. There's no good
reason to keep them outside the interconnect framework, as it only
adds to the plentiful complexity.

Add the required code to handle these clocks from within SMD RPM ICC.

RPM-owned bus clocks are no longer considered a thing, but sadly we
have to allow for the existence of HLOS-owned bus clocks, as some
(mostly older) SoCs (ab)use these for bus scaling (e.g. MSM8998 and
&mmcc AHB_CLK_SRC).

This in turn is trivially solved with a single *clk, which is filled
and used iff qp.bus_clk_desc is absent and we have a "bus" clock-names
entry in the DT node.

This change should(tm) be fully compatible with all sorts of old
Device Trees as far as the interconnect functionality goes (modulo
abusing bus clock handles or wrongly using the qcom,icc.h binding,
but that's a mistake in and of itself).

Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 9d0a282c3e interconnect: qcom: qcm2290: Hook up RPM bus clk definitions
Assign the necessary definitions to migrate to the new bus clock
handling mechanism.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 6424985ede interconnect: qcom: msm8916: Hook up RPM bus clk definitions
Assign the necessary definitions to migrate to the new bus clock
handling mechanism.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 258a64f266 interconnect: qcom: msm8939: Hook up RPM bus clk definitions
Assign the necessary definitions to migrate to the new bus clock
handling mechanism.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio a923b8bbeb interconnect: qcom: qcs404: Hook up RPM bus clk definitions
Assign the necessary definitions to migrate to the new bus clock
handling mechanism.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 9258801ef9 interconnect: qcom: msm8996: Hook up RPM bus clk definitions
Assign the necessary definitions to migrate to the new bus clock
handling mechanism.

Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:45 -07:00
Konrad Dybcio 70ab8dee97 interconnect: qcom: sdm660: Hook up RPM bus clk definitions
Assign the necessary definitions to migrate to the new bus clock
handling mechanism.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio 918b86042b interconnect: qcom: Define RPM bus clocks
Add the definitions for RPM bus clocks that will be used by many
different platforms.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio a927eb09d4 interconnect: qcom: smd-rpm: Add rpmcc handling skeleton code
Introduce qcom_icc_rpm_set_bus_rate() in preparation for handling RPM
clock resources within the interconnect framework. This lets us greatly
simplify all of the code handling, as setting the rate comes down to:

u32 rate_khz = max(clk.sleep_rate, clk.active_rate, clk_a.active_rate)
write_to_rpm(clock.description, rate_khz);

Reviewed-by: Stephan Gerhold <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio 19ced2aec6 interconnect: qcom: Fold smd-rpm.h into icc-rpm.h
smd-rpm.h is not very useful as-is and both files are always included
anyway.. Combine them.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio 40cdeed669 interconnect: qcom: Add missing headers in icc-rpm.h
Currently the header does not provide all the required dependencies.
Fix it.

Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio b979049c38 interconnect: qcom: icc-rpm: Introduce keep_alive
The downstream kernel employs the concept of "keeping the bus alive"
by voting for the minimum (XO/19.2MHz) rate at all times on certain
(well, most) buses. This is a very important thing to have, as if we
either have a lackluster/wrong DT that doesn't specify a (high enough)
vote on a certain bus, we may lose access to the entire bus altogether.
This is very apparent when we only start introducing interconnect
support on a given platform and haven't yet introduced voting on all
peripherals.

The same can happen if we only have a single driver casting a vote on
a certain bus and that driver exits/crashes/suspends.

The keepalive vote is limited to the ACTIVE bucket, as keeping a
permanent vote on the SLEEP one could prevent the platform from properly
entering low power mode states.

Introduce the very same concept, with a slight twist: the vendor
kernel checks whether the rate is zero before setting the minimum
vote, but that's rather silly, as in doing so we're at the mercy
of CCF. Instead, explicitly clamp the rates to always be >= 19.2 MHz
for providers with keep_alive=true.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Stephan Gerhold 410da7e344 soc: qcom: smd-rpm: Move icc_smd_rpm registration to clk-smd-rpm
icc_smd_rpm will do bus clock votes itself rather than taking the
unnecessary detour through the clock subsystem. However, it can only
do that after the clocks have been handed off and scaling has been
enabled in the RPM in clk-smd-rpm.

Move the icc_smd_rpm registration from smd-rpm.c to clk-smd-rpm.c
to avoid any possible races. icc_smd_rpm gets the driver data from
the smd-rpm device, so still register the platform device on the
smd-rpm parent device.

Signed-off-by: Stephan Gerhold <[email protected]>
[Konrad: remove unrelated cleanups]
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio e1e1267413 clk: qcom: smd-rpm: Move some RPM resources to the common header
In preparation for handling the bus clocks in the icc driver, carve out
some defines and a struct definition to the common rpm header.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio 82a793e2d3 soc: qcom: smd-rpm: Use tabs for defines
Use tabs for defines to make things spaced consistently.

Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio cb0116090e soc: qcom: smd-rpm: Add QCOM_SMD_RPM_STATE_NUM
Add a preprocessor define to indicate the number of RPM contexts/states.

Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Konrad Dybcio 7296bd3f00 dt-bindings: interconnect: Add Qcom RPM ICC bindings
The SMD RPM interconnect driver requires different icc tags to the
RPMh driver. Add bindings to reflect that.

Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-15 09:54:44 -07:00
Manivannan Sadhasivam db382dd55b clk: qcom: gcc-sc8280xp: Allow PCIe GDSCs to enter retention state
With the minimal system suspend support in place for the PCIe driver that
keeps the interconnect path voted, the ALWAYS_ON flag can now be dropped.

Also, the pwrsts PWRSTS_RET_ON flag should be used to allow the GDSCs to
enter the retention state when the parent domain get's turned off during
system suspend.

Signed-off-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 21:47:28 -07:00
Danila Tikhonov ff19022b91 clk: qcom: gcc-sm7150: Add CLK_OPS_PARENT_ENABLE to sdcc2 rcg
Set .flags = CLK_OPS_PARENT_ENABLE to fix "gcc_sdcc2_apps_clk_src: rcg
didn't update its configuration" error.

Fixes: a808d58ddf ("clk: qcom: Add Global Clock Controller (GCC) driver for SM7150")
Signed-off-by: Danila Tikhonov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 21:36:48 -07:00
Taniya Das 60838878e1 dt-bindings: clock: qcom: Update my email address
Update my email address from the defunct codeaurora.org domain to the
current quicinc.com domain.

Signed-off-by: Taniya Das <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Jeffrey Hugo <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 21:36:08 -07:00
Konrad Dybcio 4712eb7ff8 clk: qcom: gcc-sc8280xp: Add missing GDSCs
There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.

Fixes: d65d005f9a ("clk: qcom: add sc8280xp GCC driver")
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 21:32:19 -07:00
Konrad Dybcio 2fd02de270 clk: qcom: gcc-sc8280xp: Add missing GDSC flags
All of the 8280's GCC GDSCs can and should use the retain registers so
as not to lose their state when entering lower power modes.

Fixes: d65d005f9a ("clk: qcom: add sc8280xp GCC driver")
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 21:32:19 -07:00
Bjorn Andersson 5605164aa8 Merge branch '[email protected]' into clk-for-6.6
Merge a set of new SC8280XP GCC GDSC constants through a topic branch,
to allow them being introduce into the DeviceTree source as well.
2023-07-09 21:30:51 -07:00
Konrad Dybcio 9eba4db02a dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs
There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.

Fixes: a66a82f2a5 ("dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings")
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 21:30:43 -07:00
Konrad Dybcio 743913b343 clk: qcom: gpucc-sm6350: Fix clock source names
fw_name for GCC inputs didn't match the bindings. Fix it.

Fixes: 013804a727 ("clk: qcom: Add GPU clock controller driver for SM6350")
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 20:53:09 -07:00
Konrad Dybcio f6f89d194e clk: qcom: gpucc-sm6350: Introduce index-based clk lookup
Add the nowadays-prefered and marginally faster way of looking up parent
clocks in the device tree. It also allows for clock-names-independent
operation, so long as the order (which is enforced by schema) is kept.

Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 20:53:09 -07:00
Varadarajan Narayanan 745dfa0786 clk: qcom: gcc-ipq9574: Add USB related clocks
Add the clocks needed for enabling USB in IPQ9574

Reviewed-by: Dmitry Baryshkov <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com
[bjorn: Clock defines split out to separate commit]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 20:43:33 -07:00
Bjorn Andersson 9e1857ee65 Merge branch 'd1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com' into clk-for-6.6
Merge the USB clock constants from a topic branch, to allow them to be
used in DeviceTree source as well.
2023-07-09 20:41:52 -07:00
Varadarajan Narayanan 85c0d23009 dt-bindings: clock: Add USB related clocks for IPQ9574
Add the clocks needed for enabling USB in IPQ9574

Reviewed-by: Dmitry Baryshkov <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com
[bjorn: Split from driver patch, to allow merging into dts tree]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 20:40:33 -07:00
Luca Weiss e21e74c6e2 clk: qcom: mmcc-msm8974: Add OXILICX_GDSC for msm8226
On msm8226 we also have OXILICX_GDSC but we need a slighly different
config, with a .cxcs defined for clock but with no parent.

Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-09 20:25:28 -07:00